<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom" xmlns:content="http://purl.org/rss/1.0/modules/content/"><channel><title>Ivan Pribec</title><link>https://ivan-pi.github.io/links/</link><description>Recent content on Ivan Pribec</description><generator>Hugo -- gohugo.io</generator><language>en</language><copyright>© 2025 — Ivan Pribec — All rights reserved.</copyright><atom:link href="https://ivan-pi.github.io/links/index.xml" rel="self" type="application/rss+xml"/><item><title>Diary</title><link>https://ivan-pi.github.io/links/diary/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://ivan-pi.github.io/links/diary/</guid><description>&lt;p&gt;A chronological collection of things I&amp;rsquo;ve found interesting. Back to &lt;a href="https://ivan-pi.github.io/links/"&gt;links&lt;/a&gt;.&lt;/p&gt;
&lt;h2 id="2026-07-18"&gt;2026-07-18&lt;/h2&gt;
&lt;p&gt;GPU &amp;amp; Accelerated Computing:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;a href="https://www.aleksagordic.com/blog/collective-operations"&gt;Inside TPU and GPU Clusters: The Anatomy of Collective Communication | Aleksa Gordić&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://rocm.blogs.amd.com/software-tools-optimization/porting-hip-flydsl/README.html"&gt;Porting High-Performance HIP Kernels to FlyDSL | AMD ROCm Blogs&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://developers.redhat.com/articles/2026/02/19/understanding-aten-pytorchs-tensor-library#"&gt;Understanding ATen: PyTorch&amp;rsquo;s tensor library | Red Hat Developer&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://github.com/NVIDIA/matx"&gt;MatX - GPU-Accelerated Numerical Computing in Modern C++ | NVIDIA&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://www.smish.dev/programming/metal_compute_cpp/metal_compute_cpp.pdf"&gt;Metal Compute Shaders And C++&lt;/a&gt; (PDF)&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Linear Algebra:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;a href="https://news.ycombinator.com/item?id=47644703"&gt;Show HN: LAPACK without Fortran77; a C11 translation (github.com/ilayn)&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://github.com/ilayn/semicolon-lapack"&gt;semicolon-lapack&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;AI Compute Extensions (ACE):&lt;/p&gt;</description><content:encoded><![CDATA[<p>A chronological collection of things I&rsquo;ve found interesting. Back to <a href="/links/">links</a>.</p>
<h2 id="2026-07-18">2026-07-18</h2>
<p>GPU &amp; Accelerated Computing:</p>
<ul>
<li><a href="https://www.aleksagordic.com/blog/collective-operations">Inside TPU and GPU Clusters: The Anatomy of Collective Communication | Aleksa Gordić</a></li>
<li><a href="https://rocm.blogs.amd.com/software-tools-optimization/porting-hip-flydsl/README.html">Porting High-Performance HIP Kernels to FlyDSL | AMD ROCm Blogs</a></li>
<li><a href="https://developers.redhat.com/articles/2026/02/19/understanding-aten-pytorchs-tensor-library#">Understanding ATen: PyTorch&rsquo;s tensor library | Red Hat Developer</a></li>
<li><a href="https://github.com/NVIDIA/matx">MatX - GPU-Accelerated Numerical Computing in Modern C++ | NVIDIA</a></li>
<li><a href="https://www.smish.dev/programming/metal_compute_cpp/metal_compute_cpp.pdf">Metal Compute Shaders And C++</a> (PDF)</li>
</ul>
<p>Linear Algebra:</p>
<ul>
<li><a href="https://news.ycombinator.com/item?id=47644703">Show HN: LAPACK without Fortran77; a C11 translation (github.com/ilayn)</a></li>
<li><a href="https://github.com/ilayn/semicolon-lapack">semicolon-lapack</a></li>
</ul>
<p>AI Compute Extensions (ACE):</p>
<ul>
<li><a href="https://www.phoronix.com/news/Intel-GCC-ACE-AI-Patches">Intel Posts Initial GCC Compiler Patches For AI Compute Extensions &ldquo;ACE&rdquo; | Phoronix</a></li>
<li><a href="https://x86ecosystem.org/wp-content/uploads/2026/03/ACE-Whitepaper-v1.pdf">The AI Compute Extensions (ACE) for x86</a> (PDF, 147 KB)</li>
</ul>
<p>Finite Elements &amp; CFD:</p>
<ul>
<li><a href="https://www.smish.dev/programming/dynamic_kernel_refactor/">Templated FEM kernels: Benefits and Drawbacks</a></li>
<li><a href="https://blog.3ds.com/brands/simulia/from-particles-grid-wind-tunnel-digital-rival-rise-lbm-defense-aviation/">From Particles on a Grid to the Wind Tunnel’s Digital Rival: The Rise of LBM in Defense Aviation | Dassault Systèmes SIMULIA</a></li>
</ul>
<p>Programming:</p>
<ul>
<li><a href="https://chandlerc.blog/posts/2024/11/story-time-bounds-checking/">Story-time: C++, bounds checking, performance, and compilers | Chandler Carruth</a></li>
<li><a href="https://cautomaton.com/articles/second-coming-of-the-command-line/">The Second Coming of the Command Line</a></li>
</ul>
<p>Life Advice:</p>
<ul>
<li><a href="https://cacm.acm.org/opinion/life-lessons-from-the-first-half-century-of-my-career/">Life Lessons from the First Half-Century of My Career | Communications of the ACM</a></li>
<li><a href="https://www.bbc.com/culture/article/20260713-what-the-middle-ages-can-teach-us-about-burnout">What the Middle Ages can teach us about preventing burnout | BBC Culture</a></li>
</ul>
<h2 id="2026-05-28">2026-05-28</h2>
<ul>
<li><a href="https://www.sigarch.org/architecture-systems-are-changing-the-architects-role-in-the-era-of-agentic-co-design/">Architecture &amp; Systems are Changing: The Architect’s Role in the Era of Agentic Co-Design | Computer Architecture Today</a></li>
<li><a href="https://developer.arm.com/community/arm-community-blogs/b/servers-and-cloud-computing-blog/posts/what-s-new-in-arm-performance-libraries-26-01">What&rsquo;s new in Arm Performance Libraries 26.01 | Arm Developer Community</a></li>
<li><a href="https://developer.arm.com/community/arm-community-blogs/b/servers-and-cloud-computing-blog/posts/perf-libs-sparse-on-arm">perf-libs-sparse: Introducing a new open-source project for sparse linear algebra on Arm | Arm Developer Community</a></li>
<li><a href="https://www.phoronix.com/review/nvidia-vera-benchmarks">NVIDIA Vera CPU Benchmarks: Olympus Cores Delivering The Best Performance Ever Seen On ARM | Phoronix</a></li>
<li><a href="https://epubs.stfc.ac.uk/manifestation/4395/RAL_TR_2009_019.pdf">Code Coverage Analysis for Fortran | Science and Technology Facilities Council Rutherford Appleton Laboratory</a> (PDF)</li>
<li><a href="https://davidoks.blog/p/why-japanese-companies-do-so-many">Why Japanese companies do so many different things | David Oks</a></li>
<li><a href="https://youtu.be/Fa_KqW7np14?si=yVGbeF7bZ__55GXP">Advancing Computational Science with High-Order Finite Elements | Supercomputing Spotlights</a></li>
<li><a href="https://borretti.me/article/human-bottlenecks">Human Bottlenecks | Fernando Borretti</a></li>
<li><a href="https://www.thonking.ai/p/strangely-matrix-multiplications">Strangely, Matrix Multiplications on GPUs Run Faster When Given &ldquo;Predictable&rdquo; Data! | Thonk From First Principles</a></li>
<li><a href="https://pub.towardsai.net/cuda-tile-gpu-programming-model-1a4bc93ae9b4">NVIDIA Took 20 Years to Ship 25 Lines of Python | Delanoe Pirard, Medium</a></li>
<li><a href="https://hyper.ai/en/news/47715">Can the Tile Paradigm Reshape the Competitive Landscape of the GPU Programming Ecosystem? | HyperAI</a></li>
</ul>
<h2 id="2026-05-22">2026-05-22</h2>
<ul>
<li><a href="">Alan Hindmarsh</a></li>
<li><a href="">ODEPACK: A systematized collection</a></li>
<li><a href="">ODE Meeting Argonne</a></li>
</ul>
<h2 id="2026-05-03">2026-05-03</h2>
<ul>
<li><a href="https://physics.aps.org/articles/v19/53">Let Natural Selection Sharpen Your Writing | American Physical Society</a></li>
<li><a href="https://doi.org/10.1038/s44222-025-00323-4">Writing is thinking | nature reviews bioengineering</a></li>
</ul>
<h2 id="2026-04-25">2026-04-25</h2>
<p>Object-oriented Design Principles:</p>
<ul>
<li><a href="https://www.infoworld.com/article/2161183/why-getter-and-setter-methods-are-evil.html">Why getter and setter methods are evil</a></li>
<li><a href="https://www.yegor256.com/2014/09/16/getters-and-setters-are-evil.html">Getters/Setters. Evil. Period.</a></li>
</ul>
<p>Misc:</p>
<ul>
<li><a href="http://literateprogramming.com/ctraps.pdf">C Traps and Pitfalls</a> (PDF, 117 KB)</li>
<li><a href="https://developers.redhat.com/blog/2021/05/03/new-features-in-openmp-5-0-and-5-1#">New features in OpenMP 5.0 and 5.1</a></li>
<li><a href="https://developers.redhat.com/articles/2022/11/17/new-features-openmp-51-and-openmp-52#">New features in OpenMP 5.1 and OpenMP 5.2</a></li>
<li><a href="">Driving a New Era of Accelerated Computing Intel® Fortran Compiler (IFX)</a></li>
</ul>
<h2 id="2026-04-21">2026-04-21</h2>
<p>Intel:</p>
<ul>
<li><a href="https://www.intel.com/content/www/us/en/developer/videos/threading-composability-manager-with-onetbb.html#:~:text=Intel%C2%AE%20oneAPI%20Threading%20Building%20Blocks%20adds%20the,between%20the%20runtimes%20for%20oneTBB%20and%20OpenMP*">End Parallel Runtime Scheduling Conflicts with Thread Composability Manager</a></li>
</ul>
<p>Misc:</p>
<ul>
<li><a href="https://cacm.acm.org/federal-funding-of-academic-research/the-origins-of-gpu-computing/">The Origins of GPU Computing | Communications of the ACM</a></li>
</ul>
<h2 id="2026-04-19">2026-04-19</h2>
<p>ArmPL:</p>
<ul>
<li><a href="https://developer.arm.com/community/arm-community-blogs/b/servers-and-cloud-computing-blog/posts/arm-performance-libraries-25-04-and-arm-toolchain-for-linux-20-release">Arm Performance Libraries 25.04 and Arm Toolchain for Linux 20.1 Release</a></li>
<li><a href="https://developer.arm.com/community/arm-community-blogs/b/servers-and-cloud-computing-blog/posts/arm-performance-libraries-24-10">Arm Performance Libraries 24.10</a></li>
</ul>
<p>Batched Linear Algebra:</p>
<ul>
<li><a href="https://eprints.maths.manchester.ac.uk/2557/1/submitted_version.pdf">The Design and Performance of Batched BLAS on Modern High-Performance Computing Systems</a> (PDF)</li>
<li><a href="https://www.netlib.org/utk/people/JackDongarra/WEB-PAGES/Batched-BLAS-2017/talk02-relton.pdf">Batched BLAS APIs and Memory Layouts</a> (PDF)</li>
<li><a href="https://github.com/tttapa/batmat">batmat: Fast linear algebra routines for batches of small matrices</a></li>
<li><a href="https://www.physics.ntua.gr/~konstant/HetCluster/intel2021.7/Base/mkl/mkl_devref_c/GUID-DCBB919C-EE41-44F7-A49D-FF14538DECC7.html">Numerical Limitations for Compact BLAS and Compact LAPACK Routines</a></li>
<li><a href="https://dl.acm.org/doi/epdf/10.1145/3126908.3126941">Designing vector-friendly compact BLAS and LAPACK kernels</a></li>
<li><a href="https://www.cs.utexas.edu/~flame/BLISRetreat2018/Slides/Mesut_BLIS_Retreat_2018.pdf">INTEL® MKL Vectorized Compact routines</a> (PDF)</li>
<li><a href="https://icl.utk.edu/bblas/siam-cse19/files/06-SIAM_CSE19_BatchedBLASIntel.pdf">Adventures in Batched Linear Algebra in Intel® Math Kernel Library</a> (PDF)</li>
<li><a href="https://icl.utk.edu/bblas/sc24/">Batched BLAS, SC24 BoF Session</a></li>
<li><a href="https://community.arm.com/arm-community-blogs/b/tools-software-ides-blog/posts/new-interleave-batched-linear-algebra-functions-in-arm-pl">Introducing interleave-batched linear algebra functions in Arm PL</a></li>
<li><a href="https://github.com/giaf/blasfeo">BLASFEO - BLAS For Embedded Optimization</a></li>
</ul>
<p>cuTile:</p>
<ul>
<li><a href="https://developer.nvidia.com/blog/focus-on-your-algorithm-nvidia-cuda-tile-handles-the-hardware/">Focus on Your Algorithm—NVIDIA CUDA Tile Handles the Hardware</a></li>
<li><a href="https://docs.nvidia.com/cuda/cutile-python/">cuTile Python | Nvidia</a></li>
<li><a href="https://cfp.scipy.org/scipy2025/talk/PBLESZ/">cuTile, the New/Old Kid on the Block: Python Programming Models for GPUs</a></li>
<li><a href="https://github.com/NVIDIA/cuda-tile">CUDA Tile IR</a></li>
<li><a href="https://www.njordy.com/2025/12/14/cuTile/">cuTile Kernels</a></li>
<li><a href="https://github.com/JuliaGPU/cuTile.jl">cuTile.jl</a></li>
<li><a href="https://juliahub.com/blog/cutile.jl-bringing-nvidia-s-tile-based-gpu-programming-to-julia">cuTile.jl: Bringing NVIDIA&rsquo;s Tile-Based GPU Programming to Julia</a></li>
<li><a href="https://github.com/NVIDIA/TileGym">TileGym</a></li>
<li><a href="https://maknee.github.io/blog/2026/NVIDIA-TileIR-Internals-from-CuTile-to-MLIR-LLVM-to-SASS/">NVIDIA TileIR Internals: from CuTile to MLIR/LLVM to SASS</a></li>
<li><a href="https://patricktoulme.substack.com/p/cutile-on-blackwell-nvidias-compiler">CuTile on Blackwell: NVIDIA&rsquo;s Compiler Moat Is Already Built</a></li>
<li><a href="https://m-sp.org/downloads/eurollvm_2026_cuda_tile_ir.pdf">CUDA Tile IR: Lessons from a Tile-Centric CUDA Dialect for MLIR</a></li>
</ul>
<p>Interpreters:</p>
<ul>
<li><a href="https://stackoverflow.com/questions/511566/what-opcode-dispatch-strategies-are-used-in-efficient-interpreters">What opcode dispatch strategies are used in efficient interpreters?</a></li>
<li><a href="https://langdev.stackexchange.com/questions/1724/what-are-some-common-ways-to-optimise-an-interpreter">What are some common ways to optimise an interpreter?</a></li>
<li><a href="https://abepralle.wordpress.com/2009/01/25/how-not-to-make-a-virtual-machine-label-based-threading/">How not to make a virtual machine (label-based threading)</a></li>
<li><a href="https://noelwelsh.com/posts/understanding-vm-dispatch/">Understanding Virtual Machine Dispatch through Duality</a></li>
<li><a href="https://cs420.epfl.ch/archive/25/c/11_interp-vms.html">Interpreters and virtual machines</a></li>
<li><a href="https://ceronman.com/blog/my-experience-crafting-an-interpreter-with-rust/">My experience crafting an interpreter with Rust</a></li>
<li><a href="https://www.complang.tuwien.ac.at/forth/threaded-code.html">Threaded Code</a></li>
<li><a href="https://stefan-marr.de/2024/02/why-are-my-bytecode-interpreters-slow/">Why Are My Bytecode Interpreters Slow? Hunting Truffles with VTune</a></li>
<li><a href="https://stackoverflow.com/questions/58774170/how-to-speed-up-dynamic-dispatch-by-20-using-computed-gotos-in-standard-c">How to speed up dynamic dispatch by 20% using computed gotos in standard C++</a></li>
<li><a href="https://eli.thegreenplace.net/2012/07/12/computed-goto-for-efficient-dispatch-tables">Computed goto for efficient dispatch tables</a></li>
<li><a href="https://gcc.gnu.org/onlinedocs/gcc/Labels-as-Values.html">Labels as Values</a></li>
<li><a href="https://news.ycombinator.com/item?id=15395429">Are Jump Tables Always Fastest</a></li>
</ul>
<p>Unreachable:</p>
<ul>
<li><a href="https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p1774r4.pdf">Portable assumptions</a></li>
<li><a href="https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p0627r5.pdf">Function to mark unreachable code</a></li>
<li><a href="https://langdev.stackexchange.com/questions/462/why-do-some-languages-not-have-an-unreachable-function">Why do some languages not have an &lsquo;unreachable&rsquo; function?</a></li>
<li><a href="https://mmore500.com/2021/03/24/switch-default.html">Unreachable Switch Statement Default Cases</a></li>
<li><a href="https://learn.microsoft.com/en-us/cpp/intrinsics/assume?view=msvc-170">__assume</a></li>
<li><a href="https://softwareengineering.stackexchange.com/questions/399455/is-there-a-way-to-speed-up-a-big-switch-statement">Is there a way to speed up a big switch statement?</a></li>
<li><a href="https://softwareengineering.stackexchange.com/questions/322788/most-efficient-method-for-large-switch-statements?noredirect=1&amp;lq=1">Most efficient method for large switch statements</a></li>
</ul>
<h2 id="2026-03-20">2026-03-20</h2>
<p>Interpreters:</p>
<ul>
<li><a href="https://www.jonathanmueller.dev/talk/deep-dive-dispatch/">A Deep Dive into Dispatching Techniques | Jonathan Müller</a></li>
<li><a href="https://blog.reverberate.org/2021/04/21/musttail-efficient-interpreters.html">Parsing Protobuf at 2+GB/s: How I Learned To Love Tail Calls in C | Josh Haberman</a></li>
<li><a href="http://lua-users.org/lists/lua-l/2011-02/msg00742.html">Subject: Re: Suggestions on implementing an efficient instruction set simulator in LuaJIT2</a></li>
<li><a href="https://www.lua.org/doc/jucs05.pdf">The Implementation of Lua 5.0</a> (PDF, 145 KB)</li>
<li><a href="https://www.reddit.com/r/programming/comments/badl2/comment/c0lrus0/">LuaJIT 2 beta 3 is out: Support both x32 &amp; x64 (comment by mikemike)</a></li>
<li><a href="https://zackoverflow.dev/writing/template-interpreters">Template Interpreters | zackoverflow</a></li>
<li><a href="https://youtu.be/V8dnIw3amLA?si=qCtqYOaqwbzGoln_">Cheaply writing a fast interpreter - Neil Mitchell</a></li>
<li><a href="https://inria.hal.science/hal-01100647/document">Branch Prediction and the Performance of Interpreters - Don’t Trust Folklore</a></li>
<li><a href="https://www.reddit.com/r/ProgrammingLanguages/comments/oq4q4a/relative_performance_of_interpreter/">Relative performance of interpreter implementations</a></li>
</ul>
<h2 id="2026-02-05">2026-02-05</h2>
<p>Misc:</p>
<ul>
<li><a href="https://developer.nvidia.com/blog/establishing-a-scalable-sparse-ecosystem-with-the-universal-sparse-tensor/">Establishing a Scalable Sparse Ecosystem with the Universal Sparse Tensor | Nvidia</a></li>
<li><a href="https://arxiv.org/abs/2601.07827">Tensor Algebra Processing Primitives (TAPP): Towards a Standard for Tensor Operations | arXiv</a></li>
<li><a href="https://raphlinus.github.io/gpu/2025/03/21/good-parallel-computer.html">I want a good parallel computer | Raph Levien</a></li>
<li><a href="https://tomforsyth1000.github.io/blog.wiki.html#%5B%5BWhy%20didn%27t%20Larrabee%20fail%3F%5D%5D">Why didn&rsquo;t Larrabee fail? | TomF&rsquo;s Tech Blog</a></li>
<li><a href="https://ubc.ca.panopto.com/Panopto/Pages/Viewer.aspx?id=880a1d92-30d7-4683-80e7-b1e000f501d3">Death and Life in Silicon Valley | Erik Lindholm</a> (lecture recording)</li>
</ul>
<p>Stencils:</p>
<ul>
<li><a href="https://dl.acm.org/doi/epdf/10.1145/509593.509605">Compiling stencils in high performance Fortran</a></li>
<li><a href="https://inria.hal.science/hal-01955542/document">Register Optimizations for Stencils on GPUs</a></li>
<li><a href="https://arxiv.org/pdf/2404.04441">Evaluation of Programming Models and Performance for Stencil Computation on Current GPU Architectures</a></li>
</ul>
<p>Batched BLAS:</p>
<ul>
<li><a href="https://icl.utk.edu/bblas/">Batched BLAS | Innovative Computing Laboratory</a></li>
<li><a href="https://www.netlib.org/utk/people/JackDongarra/WEB-PAGES/Batched-BLAS-2017/talk10-siva.pdf">KokkosKernels: Compact Layouts for Batched Blas and Sparse Matrix-Matrix multiply</a></li>
</ul>
<p>Runtime dispatch:</p>
<ul>
<li><a href="https://lemire.me/blog/2020/07/17/the-cost-of-runtime-dispatch/">The cost of runtime dispatch | Daniel Lemire</a></li>
<li><a href="https://gcc.gnu.org/onlinedocs/gcc/Function-Multiversioning.html">Function Multiversioning | GCC</a></li>
<li><a href="https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-2/ax-qax.html">ax, Qax (Compiler Option) | Intel oneAPI DPC++/C++ Compiler</a></li>
<li><a href="https://maskray.me/blog/2023-02-05-function-multi-versioning">Function multi-versioning | MaskRay</a></li>
<li><a href="https://hannes.hauswedell.net/post/2017/12/09/fmv/">The - surprisingly limited - usefulness of function multiversioning in GCC</a></li>
<li><a href="https://llvm.org/devmtg/2014-10/Slides/Christopher-Function%20Multiversioning%20Talk.pdf">Architecture Specific Code Generation and Function Multiversioning | Eric Christopher</a></li>
<li><a href="https://stackoverflow.com/questions/44479069/generate-code-for-multiple-simd-architectures">Generate code for multiple SIMD architectures</a></li>
<li><a href="https://nvidia.github.io/grace-cpu-benchmarking-guide/developer/cpudetect.html">Runtime CPU Detection | Nvidia Grace CPU Benchmarking Guide</a></li>
<li><a href="https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=feature">Intel® Intrinsics Guide</a></li>
<li><a href="http://johnnysswlab.com/cpu-dispatching-make-your-code-both-portable-and-fast/">CPU Dispatching: Make your code both portable and fast</a></li>
<li><a href="https://www.intel.com/content/www/us/en/docs/onemkl/developer-guide-windows/2025-2/instruction-set-specific-dispatch-on-intel-archs.html">Instruction Set–Specific Dispatching on Intel® Architectures</a></li>
<li><a href="https://numpy.org/doc/stable/reference/simd/how-it-works.html">How does the CPU dispatcher work? | NumPy</a></li>
<li><a href="https://attractivechaos.wordpress.com/2017/09/04/on-cpu-dispatch/">On CPU dispatch | AttractiveChaos</a></li>
</ul>
<h2 id="2026-01-12">2026-01-12</h2>
<p>Fortran Software Papers:</p>
<ul>
<li><a href="https://doi.org/10.1002/spe.4380030203">Serious FORTRAN (1973)</a></li>
<li><a href="https://doi.org/10.1002/spe.4380030303">Serious FORTRAN—Part 2 (1973)</a></li>
<li><a href="https://doi.org/10.1002/spe.4380111006">Fortran 77 portability (1981)</a></li>
<li><a href="https://doi.org/10.1002/spe.4380160607">A fortran procedure for drawing some space-filling curves (1986)</a></li>
<li><a href="https://www.cs.unc.edu/~stotts/COMP145/modules.html">Module coupling and cohesion (COMP145, 2000)</a> (see <a href="https://www.cs.unc.edu/~stotts/COMP145/">Team Software Engineering</a> course homepage)</li>
<li><a href="https://dl.acm.org/doi/pdf/10.1145/181593.181602">Multibox Parsers (1994)</a> (PDF, 702 KB)</li>
<li><a href="https://doi.org/10.1109/52.406759">Multibox parsers: no more handwritten lexical parsers</a></li>
</ul>
<p>Fortran Subsets (ELF90 and F):</p>
<ul>
<li><a href="https://dl.acm.org/doi/pdf/10.1145/263877.263884">Loren Meissner, Little Giants - The New Fortran Subsets (1996)</a> (PDF, 425 KB)</li>
<li><a href="https://dl.acm.org/doi/pdf/10.1145/274104.274105">Jerry Wagener, Fortran Reflections (1997)</a></li>
<li><a href="https://doi.org/10.1063/1.168632">Fortran 90 subsets offer simplified environment for first-time users (1998)</a></li>
</ul>
<p>Finite Difference Calculations:</p>
<ul>
<li><a href="https://doi.org/10.1002/spe.4380020404">An extension of FORTRAN containing finite difference operators (1972)</a></li>
<li><a href="https://doi.org/10.1002/nme.1620090307">A Fortran program to generate finite difference formulas (1975)</a></li>
<li><a href="https://doi.org/10.1016/0021-9991(78)90103-1">FORTRAN subprograms for finite-difference formulas (1976)</a></li>
<li><a href="http://dx.doi.org/10.1090/S0025-5718-1988-0935077-0">Generation of finite difference formulas on arbitrarily spaced grids (1988)</a> (formulas are implemented <a href="https://github.com/bjodah/finitediff">here</a>, <a href="https://www.colorado.edu/amath/sites/default/files/attached-files/mathcomp_88_fd_formulas.pdf">authors copy</a>?)</li>
<li><a href="https://www.proquest.com/openview/fff2a877976f61a2f96d5d5d8bebc2ae/1?pq-origsite=gscholar&amp;cbl=18750&amp;diss=y">An abstract machine for partial differential equations (1994)</a></li>
<li><a href="https://developer.nvidia.com/blog/finite-difference-methods-cuda-fortran-part-1/">Finite Difference Methods in CUDA Fortran, Part 1</a></li>
<li><a href="https://developer.nvidia.com/blog/finite-difference-methods-cuda-fortran-part-2/">Finite Difference Methods in CUDA Fortran, Part 2</a></li>
</ul>
<p>Make papers:</p>
<ul>
<li><a href="https://doi.org/10.1002/spe.4380140607">Automatic generation of make dependencies (1984)</a></li>
<li><a href="https://doi.org/10.1002/spe.4380190805">A simple technique for automatic recompilation in modular programming languages (1989)</a></li>
<li><a href="https://doi.org/10.1002/spe.4380141206">Avoiding trickle-down recompilation in the Mary2 implementation</a></li>
</ul>
<p>Misc:</p>
<ul>
<li><a href="https://wunkolo.github.io/post/2025/12/vpternlog-signed-saturation/">vpternlog: Signed Saturation</a></li>
<li><a href="https://modal.com/gpu-glossary/readme">Modal, GPU Glossary</a></li>
<li><a href="https://fabiensanglard.net/cuda/index.html">Fabien Sanglard, A History of Nvidia Stream Multiprocessor</a></li>
<li><a href="https://www.lrz.de/fileadmin/Medien/Downloadbereich/Chroniken/LRZ-Chronik-1962-2012.pdf">Heinz-Gerd Hegering, 50 Jahre LRZ (1962-2012)</a></li>
</ul>
<h2 id="2025-12-21">2025-12-21</h2>
<p>R history and other links:</p>
<ul>
<li><a href="https://www.stat.auckland.ac.nz/~ihaka/downloads/Interface98.pdf">R: Past and Future History | Ross Ihaka</a> (PDF, 92.5 KB)</li>
<li><a href="https://sas.uwaterloo.ca/~rwoldfor/software/R-code/historyOfS.pdf">A Brief History of S | Richard A. Becker</a> (PDF, 151 KB)</li>
<li><a href="https://www.r-project.org/conferences/useR-2006/Slides/Chambers.pdf">History of S and R | John Chambers</a> (PDF, 234 KB)</li>
<li><a href="https://bookdown.org/rdpeng/rprogdatascience/history-and-overview-of-r.html">History and Overview of R | R Programming for Data Science</a></li>
<li><a href="https://epub.ub.uni-muenchen.de/2085/1/tr012.pdf">R behind the scenes: Using S the (un)usual way | Friedrich Leisch</a> (PDF, 1357 KB)</li>
</ul>
<p>(Gathered for my reply <a href="https://fortran-lang.discourse.group/t/fsml-v0-1-0-alpha-initial-release/10561/11?u=ivanpribec">here</a>.)</p>
<h2 id="2025-12-20">2025-12-20</h2>
<p>Co-Array Fortran Resources:</p>
<ul>
<li><a href="https://wg5-fortran.org/N1801-N1850/N1824.pdf">Coarray in the next Fortran Standard | John Reid</a></li>
<li><a href="https://doku.lrz.de/coarray-fortran-on-lrz-s-hpc-systems-10746527.html">Coarray Fortran on LRZ&rsquo;s HPC systems</a></li>
<li><a href="https://coarrays.sourceforge.io/doc.html">Parallel programming with Fortran 2008 and 2018 coarrays | Anton Shterenlikht</a></li>
<li><a href="https://github.com/tkoenig1/coarray-tutorial">coarray-tutorial | Thomas König</a> (look for <code>tutorial.md</code>)</li>
<li><a href="https://cpe.ext.hpe.com/docs/latest/cce/man7/intro_pgas.7.html">Introduction to PGAS | Cray Compiler Environment, HPE</a></li>
</ul>
<p>Co-Array Fortran Articles:</p>
<ul>
<li><a href="https://doi.org/10.1007/BFb0095362">Writing a multigrid solver using co-array fortran (1998) | Numrich et al.</a></li>
<li><a href="https://dl.acm.org/doi/10.5555/1025127.1025994">A multi-platform co-array fortran compiler (2004) | Dotsenko et al.</a></li>
<li><a href="https://doi.org/10.1145/1080399.1080400">Co-arrays in the next Fortran standard (2005) | Numrich &amp; Reid</a></li>
<li><a href="https://doi.org/10.1007/11752578_116">A parallel numerical library for co-array Fortran (2005) | Numrich</a></li>
<li><a href="https://doi.org/10.1016/j.parco.2005.03.003">Parallel numerical algorithms based on tensor notation and Co-Array Fortran syntax (2005) | Numrich</a></li>
<li><a href="https://doi.org/10.1145/1809961.1809969">A new vision for Coarray Fortran (2009) | Mellor-Crummey et al.</a></li>
<li><a href="https://doi.org/10.1145/2020373.2020386">An open-source compiler and runtime implementation for Coarray Fortran (2010) | Eachempati et al.</a></li>
<li><a href="https://doi.org/10.1109/SC.Companion.2012.106">A coarray fortran implementation to support data-intensive application development (2012) | Eachempati et al.</a></li>
<li><a href="https://doi.org/10.1145/2676870.2676873">Experiences at scale with PGAS versions of a Hydrodynamics application (2014) | Mallinson et al.</a></li>
<li><a href="https://doi.org/10.1016/j.jcp.2015.05.020">Comparing Coarray Fortran (CAF) with MPI for several structured mesh PDE applications (2015) | Garain et al.</a></li>
<li><a href="https://doi.org/10.1155/2017/3409647">MPI to Coarray Fortran: experiences with a CFD solver for unstructured meshes (2017) | Sharma &amp; Moulitsas</a></li>
<li><a href="https://doi.org/10.1016/j.jpdc.2024.104977">Accelerating Fortran codes: A method for integrating Coarray Fortran with CUDA Fortran and OpenMP (2025) | McKevitt et al.</a></li>
</ul>
<p>Fortran debate:</p>
<ul>
<li><a href="https://doi.org/10.1145/135226.135231">David Cann (1992). Retire Fortran? A Debate Rekindled</a> (an earlier version is available in the Supercomputing &lsquo;91 proceedings)</li>
<li><a href="https://doi.org/10.1063/1.2973891">Kuck &amp; Wolfe (1984). A debate: Retire FORTRAN? No</a></li>
<li><a href="https://doi.org/10.1063/1.2916244">J.R. McGraw (1984) A debate: Retire FORTRAN? Yes</a></li>
</ul>
<p>I found these at the bottom of the Fortran Wiki <a href="https://fortranwiki.org/fortran/show/Articles">Articles</a> page.</p>
<h2 id="2025-12-18">2025-12-18</h2>
<p>Nvidia PTX Resources:</p>
<ul>
<li><a href="https://developer.nvidia.com/blog/understanding-ptx-the-assembly-language-of-cuda-gpu-computing/">Understanding PTX, the Assembly Language of CUDA GPU Computing | Nvidia</a></li>
<li><a href="https://developer.nvidia.com/blog/advanced-nvidia-cuda-kernel-optimization-techniques-handwritten-ptx/">Advanced NVIDIA CUDA Kernel Optimization Techniques: Handwritten PTX | Nvidia</a></li>
<li><a href="https://docs.nvidia.com/cuda/inline-ptx-assembly/index.html">Inline PTX Assembly in CUDA | Nvidia</a></li>
<li><a href="https://modal.com/gpu-glossary/device-software/parallel-thread-execution">What is Parallel Thread Execution? | Modal</a></li>
<li><a href="https://eunomia.dev/others/cuda-tutorial/02-ptx-assembly/">Tutorial: Understanding GPU Assembly with PTX | eunomia</a></li>
<li><a href="https://docs.nvidia.com/cuda/parallel-thread-execution/">Parallel Thread Execution ISA Version 9.1 | Nvidia</a></li>
<li><a href="https://docs.nvidia.com/cuda/archive/8.0/parallel-thread-execution/">Parallel Thread Execution ISA Version 5.0 | Nvidia</a></li>
<li><a href="https://docs.nvidia.com/cuda/archive/10.0/parallel-thread-execution/index.html">Parallel Thread Execution ISA Version 6.3 | Nvidia</a></li>
<li><a href="https://developer.download.nvidia.com/compute/DevZone/docs/html/C/doc/ptx_isa_3.0.pdf">Parallel Thread Execution ISA Version 3.0 | Nvidia</a> (PDF, 2.2 MB)</li>
<li><a href="https://www.cs.cmu.edu/afs/cs/academic/class/15668-s11/www/cuda-doc/ptx_isa_1.4.pdf">PTX: Parallel Thread Execution ISA Version 1.4</a> (PDF, 2.5 MB)</li>
<li><a href="https://arcb.csc.ncsu.edu/~mueller/cluster/nvidia/2.0/ptx_isa_12.pdf">PTX: Parallel Thread Execution ISA Version 1.2</a> (PDF, 2.4 MB)</li>
<li><a href="https://www.doc.ic.ac.uk/~wl/teachlocal/arch/papers/nvidia-PTX_ISA_1.0.pdf">PTX: Parallel Thread Execution ISA Version 1.0</a> (PDF, 558 KB)</li>
<li><a href="https://thechipletter.substack.com/p/nvidias-ptx">Nvidia&rsquo;s PTX: Some background to the &lsquo;virtual instruction set&rsquo; that underpins CUDA | The Chip Letter</a></li>
<li><a href="https://docs.nvidia.com/cuda/ptx-writers-guide-to-interoperability/index.html">PTX Writer&rsquo;s Guide to Interoperability | Nvidia</a></li>
<li><a href="https://philipfabianek.com/posts/cuda-ptx-introduction/">A Gentle Introduction to CUDA PTX | Philip Fabianek</a> (<a href="https://news.ycombinator.com/item?id=45395156">HN Thread</a>)</li>
<li><a href="https://docs.nvidia.com/cuda/cuda-binary-utilities/index.html">CUDA Binary Utilities | Nvidia</a></li>
<li><a href="https://www.cs.uaf.edu/2011/spring/cs641/lecture/03_03_CUDA_PTX.html">CUDA PTX: GPU assembly language | Dr. Lawlor</a></li>
<li><a href="https://maknee.github.io/blog/2025/Maybe-Consider-Putting-Cutlass-In-Your-CUDA-Kernels/">Maybe consider putting &ldquo;cutlass&rdquo; in your CUDA/Triton kernels | Henry Zhu</a></li>
<li><a href="https://redplait.blogspot.com/2025/02/ptx-internals.html">ptx internals | redp</a></li>
<li><a href="https://www.aleksagordic.com/blog/matmul">Inside NVIDIA GPUs: Anatomy of high performance matmul kernels | Aleksa Gordić</a></li>
</ul>
<h2 id="2025-11-26">2025-11-26</h2>
<ul>
<li><a href="https://www.eecs.harvard.edu/~htk/publication/1982-kung-why-systolic-architecture.pdf">Why Systolic Architectures?</a> (PDF, 2.4 MB)</li>
<li><a href="https://flang.llvm.org/docs/index.html">Flang Documentation</a></li>
<li><a href="https://blogs.fau.de/hager/files/2013/11/sc13_tutorial_134.pdf">The Practitioner&rsquo;s Cookbook for Good Parallel Performance on Multi- and Many-Core Systems | RRZE</a> (PDF, 7.1 MB)</li>
<li><a href="https://commit.csail.mit.edu/papers/2025/Jonathan_Zhou_SB_Thesis.pdf">Performance Analysis of the Apple AMX Matrix Accelerator | Jonathan Zhou</a> (PDF, 1777 KB)</li>
<li><a href="https://lemire.me/blog/2023/03/21/counting-cycles-and-instructions-on-arm-based-apple-systems/">Counting cycles and instructions on ARM-based Apple systems | Daniel Lemire</a></li>
<li><a href="https://github.com/dougallj/applecpu?tab=readme-ov-file">Apple Firestorm/Icestorm CPU microarchitecture docs</a></li>
<li><a href="https://eclecticlight.co/2023/12/13/finding-and-evaluating-amx-co-processors-in-apple-silicon-chips/">Finding and evaluating AMX co-processors in Apple silicon chips</a></li>
<li><a href="https://arxiv.org/abs/2502.05317">Apple vs. Oranges: Evaluating the Apple Silicon M-Series SoCs for HPC Performance and Efficiency</a></li>
<li><a href="https://dougallj.github.io/asil/index.html">A64 SIMD Instruction List: SVE Instructions</a></li>
<li><a href="https://scalable.uni-jena.de/opt/hpc/index.html">High Performance Computing Class | FSU Jena</a></li>
<li><a href="https://mcyoung.xyz/2023/11/27/simd-base64/">Designing a SIMD Algorithm from Scratch | mcyoung</a></li>
</ul>
<h2 id="2025-11-20">2025-11-20</h2>
<ul>
<li><a href="https://dev.to/frosnerd/comparing-openblas-and-accelerate-on-apple-silicon-for-blas-routines-2pb9">Comparing OpenBLAS and Accelerate on Apple Silicon for BLAS Routines | Frank Rosner</a></li>
<li><a href="https://tylerseanrau.github.io/BenchAndTest/">Benchmarking and Testing | Tyler Sean Rau</a></li>
<li><a href="https://www.intel.com/content/www/us/en/developer/articles/technical/openmp-simd-for-inclusiveexclusive-scans.html">OpenMP* SIMD for Inclusive/Exclusive Scans</a></li>
<li><a href="https://blogs.fau.de/hager/files/2010/07/numet_hager_08.pdf">Effiziente Nutzung von Hochleistungsrechnern in der numerischen Strömungsmechanik | Dr. Georg Hager</a> (PDF, 599 KB)</li>
<li><a href="https://dl.acm.org/doi/pdf/10.1145/29873.29875">Automatic Translation of FORTRAN Programs to Vector Form | Randy Allen and Ken Kennedy</a> (PDF, 2.8 MB)</li>
<li><a href="https://doi.org/10.1002/cpe.1009">Multimedia vectorization of floating-point MIN/MAX reductions (2006) | Bik et al.</a></li>
<li><a href="https://doku.lrz.de/files/11497000/11497017/8/1745835328413/3_Vectorization.pdf">Vectorization Essentials | Intel Software</a> (PDF, 1913 KB)</li>
<li><a href="https://doi.org/10.1109/52.7943">A comparison of 12 parallel Fortran dialects (1988) | Karp &amp; Babb</a></li>
<li><a href="https://doi.org/10.1145/3731599.3767366">Extending MPI Correctness Benchmarking to the Fortran Language (2025) | Oraji et al.</a></li>
<li><a href="https://www.ixpug.org/images/docs/isc_2024/Investigating_the_perfomance_of_LLVM-based_IFX.pdf">Investigating the performance of LLVM-based Intel Fortran Compiler (ifx) | Dhani Ruhela</a> (PDF, 596 KB)</li>
<li><a href="https://doi.org/10.25344/S4H88D">Just Write Fortran: Experiences with a Language-Based Alternative to MPI+X (2024) | Rouson et al.</a></li>
</ul>
<h2 id="2025-11-19">2025-11-19</h2>
<ul>
<li><a href="https://portal.nersc.gov/project/sparse/butterflypack/index.html">ButterflyPACK: Fast PDE solvers and transforms | NERSC</a></li>
</ul>
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