Shared-memory bank conflicts (selected degree)
Access pattern:
Each column below is one of the 32 banks; stacked cells are the threads of a warp landing in
that bank during a single access. A flat profile at height 1 (fp32) or 2 (fp64, classic model)
is the best achievable; anything taller serializes and is drawn red.
Conflict factor = gcd(w·stride, 32), so column access is independent of lda,
while row access is worst when lda is a multiple of 32/w and best when lda is odd.
Classic model: 32 banks × 4 bytes; an fp64 element spans two banks.
Compute capability ≥ 8.x can service 8-byte accesses without the inherent 2-way split;
the stride-induced conflicts shown for row access still apply. Note the trade-off:
vectorized 128-bit shared loads (
double2) require even lda, which doubles the
row-access conflict relative to odd lda.